*读取图片




define PHYS_FLASH2_1 0xBC000000 /* Image2 Bank #1 */
  1. #elif defined (ON_BOARD_16M_FLASH_COMPONENT)
  2. #define PHYS_FLASH_1		0xBCC00000 /* Image1 Bank #1 */
  3. #define PHYS_FLASH_2		0xBC000000 /* Image1 Bank #2 */
  4. #define PHYS_FLASH2_1		0xBC400000 /* Image2 Bank #1 */
  5. #define PHYS_FLASH2_2		0xBC800000 /* Image2 Bank #2 */
  6. #endif 
  7. #else //Non Dual Image
  8. #ifdef ON_BOARD_8M_FLASH_COMPONENT
  9. #define PHYS_FLASH_1		0xBC400000 /* Flash Bank #1 */
  10. #else
  11. #define PHYS_FLASH_1		0xBCC00000 /* Flash Bank #1 */
  12. #endif
  13. #define PHYS_FLASH_2		0xBC000000 /* Flash Bank #2 */
  14. #if defined (ON_BOARD_8M_FLASH_COMPONENT) || defined (ON_BOARD_16M_FLASH_COMPONENT)
  15. #define PHYS_FLASH_START	PHYS_FLASH_2 /* Address for issuing flash command */
  16. #else
  17. #define PHYS_FLASH_START	PHYS_FLASH_1 /* Address for issuing flash command */
  18. #endif
  19. #endif
  20. #elif defined (RT2883_FPGA_BOARD) || defined (RT2883_ASIC_BOARD) || \
  21.       defined (RT3883_FPGA_BOARD) || defined (RT3883_ASIC_BOARD) || \
  22.       defined (RT3352_FPGA_BOARD) || defined (RT3352_ASIC_BOARD) || \
  23.       defined (RT5350_FPGA_BOARD) || defined (RT5350_ASIC_BOARD) || \
  24.       defined (RT6855_FPGA_BOARD) || defined (RT6855_ASIC_BOARD) || \
  25.       defined (MT7620_FPGA_BOARD) || defined (MT7620_ASIC_BOARD) || \
  26.       defined (MT7621_FPGA_BOARD) || defined (MT7621_ASIC_BOARD)
  27. #define PHYS_FLASH_START	0xBC000000 /* Flash Bank #2 */
  28. #define PHYS_FLASH_1		0xBC000000 /* Flash Bank #1 */
  29.   #ifdef DUAL_IMAGE_SUPPORT
  30.   #if defined (ON_BOARD_2M_FLASH_COMPONENT)
  31.   #define PHYS_FLASH2_1		0xBC100000 /* Flash Bank #2 */
  32.   #elif defined (ON_BOARD_4M_FLASH_COMPONENT)
  33.   #define PHYS_FLASH2_1		0xBC200000 /* Flash Bank #2 */
  34.   #elif defined (ON_BOARD_8M_FLASH_COMPONENT)
  35.   #define PHYS_FLASH2_1		0xBC400000 /* Flash Bank #2 */
 
*图像处理
decompose3(Image, ImageR, ImageG, ImageB)
threshold (ImageG, Regions, 0, 183)
  1. #define CFG_EMBEDED_SRAM_START 0xA0800000
  2. #define CFG_EMBEDED_SRAM_FOR_RXRING0_DESC 0xA0800000
  3. #define CFG_EMBEDED_SRAM_FOR_TXRING0_DESC 0xA0800100
  4. #define CFG_EMBEDED_SRAM_FOR_TXRING1_DESC 0xA0800200
  5. #define CFG_EMBEDED_SRAM_BUF_START 0xA0800300
  6. #define CFG_EMBEDED_SRAM_SDP0_BUF_START 0xA0804000
  7. #define CFG_EMBEDED_SRAM_END   0xA0807FFF


  1. #define PHYS_FLASH2_1		0xBC000000 /* Image2 Bank #1 */
  2. #elif defined (ON_BOARD_16M_FLASH_COMPONENT)
  3. #define PHYS_FLASH_1		0xBCC00000 /* Image1 Bank #1 */
  4. #define PHYS_FLASH_2		0xBC000000 /* Image1 Bank #2 */
  5. #define PHYS_FLASH2_1		0xBC400000 /* Image2 Bank #1 */
  6. #define PHYS_FLASH2_2		0xBC800000 /* Image2 Bank #2 */
  7. #endif 
  8. #else //Non Dual Image
  9. #ifdef ON_BOARD_8M_FLASH_COMPONENT
  10. #define PHYS_FLASH_1		0xBC400000 /* Flash Bank #1 */
  11. #else
  12. #define PHYS_FLASH_1		0xBCC00000 /* Flash Bank #1 */
  13. #endif
  14. #define PHYS_FLASH_2		0xBC000000 /* Flash Bank #2 */
  15. #if defined (ON_BOARD_8M_FLASH_COMPONENT) || defined (ON_BOARD_16M_FLASH_COMPONENT)
  16. #define PHYS_FLASH_START	PHYS_FLASH_2 /* Address for issuing flash command */
  17. #else
  18. #define PHYS_FLASH_START	PHYS_FLASH_1 /* Address for issuing flash command */
  19. #endif
  20. #endif
  21. #elif defined (RT2883_FPGA_BOARD) || defined (RT2883_ASIC_BOARD) || \
  22.       defined (RT3883_FPGA_BOARD) || defined (RT3883_ASIC_BOARD) || \
  23.       defined (RT3352_FPGA_BOARD) || defined (RT3352_ASIC_BOARD) || \
  24.       defined (RT5350_FPGA_BOARD) || defined (RT5350_ASIC_BOARD) || \
  25.       defined (RT6855_FPGA_BOARD) || defined (RT6855_ASIC_BOARD) || \
  26.       defined (MT7620_FPGA_BOARD) || defined (MT7620_ASIC_BOARD) || \
  27.       defined (MT7621_FPGA_BOARD) || defined (MT7621_ASIC_BOARD)
  28. #define PHYS_FLASH_START	0xBC000000 /* Flash Bank #2 */
  29. #define PHYS_FLASH_1		0xBC000000 /* Flash Bank #1 */
  30.   #ifdef DUAL_IMAGE_SUPPORT
  31.   #if defined (ON_BOARD_2M_FLASH_COMPONENT)
  32.   #define PHYS_FLASH2_1		0xBC100000 /* Flash Bank #2 */
  33.   #elif defined (ON_BOARD_4M_FLASH_COMPONENT)
  34.   #define PHYS_FLASH2_1		0xBC200000 /* Flash Bank #2 */
  35.   #elif defined (ON_BOARD_8M_FLASH_COMPONENT)
  36.   #define PHYS_FLASH2_1		0xBC400000 /* Flash Bank #2 */
2015年5月13日 10:40:01
connection (Regions, Connection)
 
select_shape (Connection, SelectedRegions, 'area', 'and', 1987.72, 7500)
 



read_ocr_class_mlp('Document_0-9.omc',OCRHandle)
do_ocr_multi_class_mlp(SelectedRegions,ImageG,OCRHandle, Class, Confidence)

*读取图片
read_image(Image,'D:/MyFile/halcon/数字识别/1.jpg')
 
*图像处理
decompose3(Image, ImageR, ImageG, ImageB)

























threshold (ImageG, Regions, 0, 183)
connection (Regions, Connection)
 
select_shape (Connection, SelectedRegions, 'area', 'and', 1987.72, 7500)
 
read_ocr_class_mlp('Document_0-9.omc',OCRHandle)
do_ocr_multi_class_mlp(SelectedRegions,ImageG,OCRHandle, Class, Confidence)




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原文地址：https://www.cnblogs.com/liujinghuan/p/1431529431135.html