计数器设计模板

所需计数的个数:num

计数器位宽:width

开始计数:wire start_cnt;

停止计数:wire end_cnt;

计数器:reg  [width-1:0]   cnt;

always @(posedge sclk or negedge rst_n)
begin
  if(rst_n == 1'b0)begin
    cnt <= 'd0;
  end
  else if(start_cnt)begin
    if(end_cnt)begin
      cnt <= 'd0;
    end
    else begin
      cnt <= cnt + 1'b1;
    end
  end
end

assign start_cnt = 1;
assign end_cnt = start_cnt && cnt==num-1;

/////////////////////////////////////////////////////////////////////////////////////////

例如:

reg [3:0] cnt0,cnt1;

wire start_cnt0,start_cnt1;

wire end_cnt0,end_cnt1;

always @(posedge sclk or negedge rst_n)
begin
  if(rst_n == 1'b0)begin
    cnt0 <= 'd0;
  end
  else if(start_cnt0)begin
    if(end_cnt0)begin
      cnt0 <= 'd0;
    end
    else begin
      cnt0 <= cnt0 + 1'b1;
    end
  end
end

assign start_cnt0 = 1;
assign end_cnt0 = start_cnt0 && cnt0==2-1;

always @(posedge sclk or negedge rst_n)
begin
   if(rst_n == 1'b0)begin
    cnt1 <= 'd0;
  end
  else if(start_cnt1)begin
    if(end_cnt1)begin
      cnt1 <= 'd0;
    end
    else begin
      cnt1 <= cnt1 + 1'b1;
    end
  end
end

assign start_cnt1 = end_cnt0;
assign end_cnt1 = start_cnt1 && cnt1==4-1;

原文地址:https://www.cnblogs.com/MAQI/p/7693332.html