花样流水灯的verilog实现

LED(Light emitting diode)发光二极管将电能转化为可见光,正向电压导通,反向电压截止。对于该板子,二极管用低电压导通,其实验原理图为:

image

所谓流水灯,即让LED像水一样的点亮,从左向右依次点亮,最右位点亮后,再从左向右移动。以下是以移位方式实现的verilog代码:

module led(
            clk,  //50M时钟输入
            reset,    //复位信号,高电平复位
            led      //led输出
);

input clk;
input reset;
output[7:0] led;

wire clk,reset;

reg [7:0]led,led_temp; 
reg [40:0] count;    //分频计数器,系统时钟频率过高,需要计数的方式来产生延时,使led保持状态一段时间

always @ (posedge clk or negedge reset)
    begin
     if(!reset)//复位
       begin
           led_temp<=8'h80;
           count<=41'h0;
       end
      else
        begin
          count<=count+1;
          if(count==41'hff_ff_ff)    //判别counter数值,做输出处理
            begin
             led_temp<=led_temp>>1;
             led<=~led_temp;
             count<=0;
             if(led_temp==8'h01)
               led_temp<=8'h80;
            end  
        end
    end
endmodule

花样流水灯根据循坏赋值方式实现:

module led_water(clk,led,reset);
input clk;
input reset;
output [7:0] led;

reg [7:0] led;
reg [23:0] counter;
reg [4:0] led_state;
reg clk_div;

always @(posedge clk)
  begin 
     if(counter==24'h500000)
      begin
        clk_div<=~clk_div;
        counter<=24'h000000;
      end
     else 
        counter<=counter+1'b1;
  end 


always @(posedge clk_div or negedge reset)
  begin 
    if(!reset)
      begin
       led<=8'hff;
       led_state<=4'b0000;
      end 
    else
     begin
      case (led_state)
        5'b00000: led<=8'b1111_1110;
        5'b00001: led<=8'b1111_1101;
        5'b00010: led<=8'b1111_1011;
        5'b00011: led<=8'b1111_0111;
        5'b00100: led<=8'b1110_1111;
        5'b00101: led<=8'b1101_1111;
        5'b00110: led<=8'b1011_1111;
        5'b00111: led<=8'b0111_1111;
        
        5'b01000: led<=8'b1011_1111;
        5'b01001: led<=8'b1101_1111;
        5'b01010: led<=8'b1110_1111;
        5'b01011: led<=8'b1111_0111;
        5'b01100: led<=8'b1111_1011; 
        5'b01101: led<=8'b1111_1101; 
        5'b01110: led<=8'b1111_1110;
        
        5'b01111: led<=8'b1110_0111;
        5'b10000: led<=8'b1101_1011;
        5'b10001: led<=8'b1011_1101;
        5'b10010: led<=8'b0111_1110;
        
        5'b10011: led<=8'b1011_1101;
        5'b10100: led<=8'b1101_1011;
        5'b10101: led<=8'b1110_0111;
        
        5'b10110: led<=8'b1010_1010;
        5'b10111: led<=8'b0101_0101;
               
        5'b11000: led<=8'b1000_0000;
        5'b11001: led<=8'b0100_0000;
        5'b11010: led<=8'b0010_0000;
        5'b11011: led<=8'b0001_0000;
        5'b11100: led<=8'b0000_1000;
        5'b11101: led<=8'b0000_0100;
        5'b11110: led<=8'b0000_0010;
        5'b11111: led<=8'b0000_0001;
        default:led<=8'b1111_1111;
      endcase
     led_state<=led_state+1'b1;
    end 
  end
endmodule

综合优化后,板子呈现花样流水灯样式。

IMG_8488

原文地址:https://www.cnblogs.com/Fun-with-FPGA/p/4722109.html