阿波罗开发板stm32f7的openocd配置

openocd的配置文件里面包含了stm32f7x.cfg
使用以下命令连接开发板

openocd -f interface/jlink.cfg -f target/stm32f7x.cfg

然后分析一下配置参数

# script for stm32f7x family

#
# stm32f7 devices support both JTAG and SWD transports.
#
source [find target/swj-dp.tcl]
source [find mem_helper.tcl]

if { [info exists CHIPNAME] } {
   set _CHIPNAME $CHIPNAME
} else {
   set _CHIPNAME stm32f7x
}

set _ENDIAN little

# Work-area is a space in RAM used for flash programming
# By default use 128kB
if { [info exists WORKAREASIZE] } {
   set _WORKAREASIZE $WORKAREASIZE
} else {
   set _WORKAREASIZE 0x20000
}

#jtag scan chain
if { [info exists CPUTAPID] } {
   set _CPUTAPID $CPUTAPID
} else {
   if { [using_jtag] } {
      # See STM Document RM0385
      # Section 40.6.3 - corresponds to Cortex-M7 with FPU r0p0
      set _CPUTAPID 0x5ba00477
   } {
      set _CPUTAPID 0x5ba02477
   }
}

swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu

if {[using_jtag]} {
   jtag newtap $_CHIPNAME bs -irlen 5
}

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap

$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0

set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME

# adapter speed should be <= F_CPU/6. F_CPU after reset is 16MHz, so use F_JTAG = 2MHz
adapter_khz 2000

adapter_nsrst_delay 100
if {[using_jtag]} {
 jtag_ntrst_delay 100
}

# use hardware reset, connect under reset
# 这里测试了下去掉srst_nogate，openocd会段错误退出，所有要保留srst_nogate
# apollo开发板的jtag接口引出了trst，所以srst_only应该也可以改为trst_and_srst
reset_config srst_only srst_nogate

if {![using_hla]} {
   # if srst is not fitted use SYSRESETREQ to
   # perform a soft reset
   cortex_m reset_config sysresetreq
}

$_TARGETNAME configure -event examine-end {
	# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
	mmw 0xE0042004 0x00000007 0

	# Stop watchdog counters during halt
	# DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP
	mmw 0xE0042008 0x00001800 0
}

$_TARGETNAME configure -event trace-config {
	# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
	# change this value accordingly to configure trace pins
	# assignment
	mmw 0xE0042004 0x00000020 0
}

#以下为后续添加的部分，从stm32f4x.cfg复制过来的
#如果觉得默认jtag速率2Mhz太慢，可以在reset-init里面完成时钟配置，然后提高jtag速率
$_TARGETNAME configure -event reset-init {
        # 待实现
	# Boost JTAG frequency
	#adapter_khz 8000
}

$_TARGETNAME configure -event reset-start {
	# Reduce speed since CPU speed will slow down to 16MHz with the reset
	#adapter_khz 2000
}