STD_LOGIC_ARITH
扩展了UNSIGNED、SIGNED、SMALL_INT(短整型)三个数据类型，并定义了相关的算术运算和转换函数。
--================================================
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity mux1 is
port(
sclk : in std_logic;
rst_n: in std_logic;
count: buffer std_logic_vector(4 downto 0)
);
end mux1;
architecture ok of mux1 is
signal cnt : std_logic_vector(4 downto 0);
begin
process
begin
wait until sclk'event and sclk= '1';
if rst_n = '0' then
cnt <=(others =>'0');
elsif unsigned(cnt ) >= 10 then
cnt <= (others =>'0');
else
cnt <= unsigned(cnt) + 2;
end if;
end process;
count <= cnt;
end ok;
--========================================================
use IEEE.NUMERIC_STD.
支持整数的MOD，REM，ABS 等运算
dd <= 5 mod 3;
dd <= 5 rem 3;
dd <= abs(-3);