【iCore4 双核心板_ARM】例程二十八：FSMC实验——读写FPGA

实验现象：

1、先烧写FPGA程序，再烧写ARM程序，ARM程序烧写完毕后即开始读写RAM测试，测试成功，绿色ARM·LED亮，测试失败，红色ARM·LED闪烁。

2、测试成功，ARM通过映射寄存器来控制FPGA三色LED循环点亮。

核心代码：

int main(void)
{

  /* USER CODE BEGIN 1 */
    int i;
    
  /* USER CODE END 1 */

  /* MCU Configuration----------------------------------------------------------*/

  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  HAL_Init();

  /* USER CODE BEGIN Init */

  /* USER CODE END Init */

  /* Configure the system clock */
  SystemClock_Config();

  /* USER CODE BEGIN SysInit */

  /* USER CODE END SysInit */

  /* Initialize all configured peripherals */
  MX_GPIO_Init();
  MX_FMC_Init();

  /* USER CODE BEGIN 2 */
    for(i = 0;i < 512;i ++){
        fpga_write(i, 2 * i);    
    }
    for(i = 0;i < 512;i ++){
        if(fpga_read(i) != 2*i){
            while(1){
                LED_RED_ON;
                HAL_Delay(500);
                LED_RED_OFF;
                HAL_Delay(500);
            }
        }
    }
    LED_GREEN_ON;
  /* USER CODE END 2 */
    
  /* Infinite loop */
  /* USER CODE BEGIN WHILE */
  while (1)
  {
  /* USER CODE END WHILE */

  /* USER CODE BEGIN 3 */
        FPGA_LED_RED_ON;
        FPGA_LED_GREEN_OFF;
        FPGA_LED_BLUE_OFF;
        HAL_Delay(500);
        
        FPGA_LED_RED_OFF;
        FPGA_LED_GREEN_ON;
        FPGA_LED_BLUE_OFF;
        HAL_Delay(500);
        
        FPGA_LED_RED_OFF;
        FPGA_LED_GREEN_OFF;
        FPGA_LED_BLUE_ON;
        HAL_Delay(500);
  }
  /* USER CODE END 3 */

}

//-----------------------Module fsmc_ctrl-----------------------//
module fsmc_ctrl(
    input clk_100m,
    input rst_n,
    input [23:16]ab,
    inout [15:0]db,
    input wr_n,
    input rd_n,
    input cs0,
    input nadv,
    output led_red,
    output led_green,
    output led_blue
);

wire wr,rd;
wire [15:0]out_data;
//-------------------------wr & rd-----------------------------//
assign wr = cs0 | wr_n;
assign rd = cs0 | rd_n;

//-------------------------address-----------------------------//
reg [23:0]address;
always@(posedge nadv or negedge rst_n)
    if(!rst_n)
        address <= 24'd0;
    else
        address <= {ab,db};       //锁存地址
        
        
//----------------------------clk------------------------------//
reg wr_clk1,wr_clk2;
always@(posedge clk_100m or negedge rst_n)
    if(!rst_n)
        begin
            wr_clk1 <= 1'd1;
            wr_clk2 <= 1'd2;
        end
    else
        {wr_clk2,wr_clk1} <= {wr_clk1,wr};
        
wire clk = (!wr_clk2 | !rd);

assign db = !rd ? out_data:16'hzzzz;

//----------------------------ram------------------------------//
ram u1(
    .address(address),
    .clock(clk),
    .data(db),
    .wren(!wr),
    .rden(!rd),
    .q(out_data)
);

//----------------------------led_ctrl-------------------------//
reg led[2:0];
always@(posedge wr or negedge rst_n)
    if(!rst_n)
        begin 
            led[0] <= 1'd1;
            led[1] <= 1'd0;
            led[2] <= 1'd1;
        end 
    else 
        begin
            case(address)     //映射寄存器地址
                24'd10:led[0] <= db;
                24'd11:led[1] <= db;
                24'd12:led[2] <= db;
            endcase            
        end

assign led_red =     led[0];
assign led_green = led[1];
assign led_blue = led[2];
    
endmodule

源代码下载链接：

链接：http://pan.baidu.com/s/1nvkhPWl 密码：7x76

iCore4链接：