OS: glossary and note

1. Each process in Linux has two stacks, a user stack and a kernel stack (8KB by default)

2. thread_info is architecure dependent but task_struct is generic

3. fork call chain:

　　libc fork()

　　　　system_call (arch/i386/kernel/entry.S)

　　　　　　sys_clone() (arch/i386/kernel/process.c)

　　　　　　　　do_fork() (kernel/fork.c)

　　　　　　　　　　copy_process() (kernel/fork.c)

　　　　　　　　　　　　p=dup_task_struct(current) //shallow copy

　　　　　　　　　　　　copy_* //copy point-to structures

　　　　　　　　　　　　copy_thread() //copy stack, regs, and eip

　　　　　　　　　　wait_up_new_task() //set child runnable　

4. exit() call chain

libc exit(...)

　　　　system_call (arch/i386/kernel/entry.S)

　　　　　　sys_exit() (kernel/exit.c)

　　　　　　　　do_exit() (kernel/exit.c)

　　　　　　　　　　exit_*() //free data stuctures

　　　　　　　　　　exit_notify() //tell other process we exit

　　　　　　　　　　　　　　　　　　　 //reparent children to init if EXIT_ZOMBIE or EXIT_DEAD

5. context switch call chain

　　schedule() (kernel/sched.c)

　　　　context_switch()

　　　　　　switch_mm (include/asm-i386/mmu_context.h)

　　　　　　switch_to (include/asm-i386/system.h)

　　　　　　　　__switch_to (arch/i386/kernel/process.c)

Linux process scheduling:

http://www.cs.columbia.edu/~junfeng/10sp-w4118/lectures/l07-proc-linux.pdf

boot process:

　　http://www.ibm.com/developerworks/library/l-linuxboot/index.html

　　http://unix.stackexchange.com/questions/89923/how-does-linux-load-the-initrd-image

　　http://www.ruanyifeng.com/blog/2013/02/booting.html

　　http://unix.stackexchange.com/questions/259143/how-does-grub-stage1-exactly-access-load-stage-2

　　http://www.pixelbeat.org/docs/disk/

Linux下的 Loop device, ramdisk device

　　https://en.wikipedia.org/w/index.php?title=Loop_device&gettingStartedReturn=true

　　http://www.tldp.org/HOWTO/archived/Loopback-Root-FS/Loopback-Root-FS-2.html

Real mode and Protected mode:

Read mode = segmented memory model,

　　read mode support only 16-bit addressing, protected mode is an enhanced version of real mode, which support 32-bit addressing

Memory alignment of 80X86 architecture:

Note that words need not be aligned at even-numbered addresses and doublewords need not be aligned at addresses evenly divisible by four. This allow maximum flexibility in data structures (e.g., records containing mixed byte, word, and doubleword items) and efficiency in memory utilization. When used in a configuration with a 32-bit bus, actual transfers of data between processor and memory take place in units of doublewords beginning at address evenly divisible by four; however, the processor converts requests for misaligned words or doublewords into the appropriate sequences of requests acceptable to the memory interface. Such misaligned data transfers reduce performance by requiring extra memory cycles. For maximum performance, data structures (including stacks) should be designed in such a way that, whenever possible, word operands are aligned at even address and doublewords operands are aligned at address evenly divisible by four. Due to instruction prefetching and queueing within CPU, there is no requirement for instructions to be aligned on word or doubleword boundaries. (However, a slight increase in speed results if the target addresses of control transfers are evenly divisible by four )

Multicore, Multiprocessor, Hyperthreading:

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