[笔记]Layout Of High Speed Differential Signaling In FPGA

一、High-Speed Differential Signalong in Cyclone Device

  Cyclone device supports the RSDS I/O standard at speeds up to 311Mbps;

  Cyclone device allow you to transmit and receive data through LVDS signals at a data rate up to 640Mbps;

二、Board Design Considerations

  

原文地址:https://www.cnblogs.com/spartan/p/2172637.html