Appendix A
附录A
PC hardware
Pc的硬件
This appendix describes personal computer (PC) hardware, the platform on which xv6 runs.
这个附录描述了xv6运行的平台——个人计算机(PC)的硬件。
A PC is a computer that adheres to several industry standards, with the goal that a given piece of software can run on PCs sold by multiple vendors. These standards evolve over time and a PC from 1990s doesn’t look like a PC now.
一个PC就是一台遵守许多工业标准，以给定的由多个厂家生产销售的一系列软件可以运行的计算机。随着时间的推移，从十九世纪九十年代的PC看起来和现在的并不完全一样。
From the outside a PC is a box with a keyboard, a screen, and various devices (e.g., CD-rom, etc.). Inside the box is a circuit board (the ‘‘motherboard’’) with CPU chips, memory chips, graphic chips, I/O controller chips, and busses through which the chips communicate. The busses adhere to standard protocols (e.g., PCI and USB) so that devices will work with PCs from multiple vendors.
从外部看，pc就是一个带有键盘、屏幕以及多个设备的盒子（比如CD驱动器等）。盒子的内部是一块电路主板（也叫主板），带有CPU芯片、内存芯片、显示芯片、I/O控制芯片以及连接各芯片的总线。总线遵守标准协议（如PCI和USB），这样多个厂商生产的设备可以和PC一起工作。
From our point of view, we can abstract the PC into three components: CPU, memory, and input/output (I/O) devices. The CPU performs computation, the memory contains instructions and data for that computation, and devices allow the CPU to interact with hardware for storage, communication, and other functions.
从我们的观点出发，可以把PC抽象为三个组成部分：CPU、内存和输入输出设备（I/O）。CPU负责计算，内存为计算存储指令和数据，外部设备允许CPU和硬件之间进行沟通，如存储、通讯和其他功能。
You can think of main memory as connected to the CPU with a set of wires, or lines, some for address bits, some for data bits, and some for control flags. To read a value from main memory, the CPU sends high or low voltages representing 1 or 0 bits on the address lines and a 1 on the ‘‘read’’ line for a prescribed amount of time and then reads back the value by interpreting the voltages on the data lines. To write a value to main memory, the CPU sends appropriate bits on the address and data lines and a 1 on the ‘‘write’’ line for a prescribed amount of time. Real memory interfaces are more complex than this, but the details are only important if you need to achieve high performance.
你可以把主存想成和CPU使用一系列的线连接在一起，有时是地址位，有时是数据位，有时是控制标志。从主存中读取值，CPU发送高或低电平代表1或0给每地址线，在读取线上一定时间内保持信号1，然后通过解释数据线上的电平，读回所代表的数值。写一个值到主存时，CPU给地址线和数据线上发送合适的值，并在写线上一定时间内保持信号1。真实的内存接口比这要复杂得多，但细节问题只有当你要达到高性能时才显得重要。
Processor and memory
处理器和内存
A computer’s CPU (central processing unit, or processor) runs a conceptually simple loop: it consults an address in a register called the program counter, reads a machine instruction from that address in memory, advances the program counter past the instruction, and executes the instruction. Repeat. If the execution of the instruction does not modify the program counter, this loop will interpret the memory pointed at by the program counter as a sequence of machine instructions to run one after the other. Instructions that do change the program counter include branches and function calls.
一个计算机的CPU（中央处理单元，或叫处理器）运行在一个概念上的简单循环:它从一个叫程序计数器的寄存器中取得地址，从那个内存地址中读取机器指令，根据指令长短增加程序计数器，执行这个指令。再次重复。如果指令的执行没有修改程序计数器，这个循环会把程序计数器指向的这个内存中的数据当作一连串的机器指令一个接一个地去运行。修改程序计数器的指令包括分支和功能调用。
The execution engine is useless without the ability to store and modify program data. The fastest storage for data is provided by the processor’s register set. A register is a storage cell inside the processor itself, capable of holding a machine word-sized value (typically 16, 32, or 64 bits). Data stored in registers can typically be read or written quickly, in a single CPU cycle.
如果没有了存储和个性程序数据的能力，执行引擎是没有用处的。对于数据来说最快的存取是处理器中提供的一系列的寄存器。寄存器是处理器内部提供的一个存储单元，可以容纳一个机器字大小的数值（典型的为16位、32位或64位）。寄存器中存储的数据能在一个CPU周期中被迅速地读写。
PCs have a processor that implements the x86 instruction set, which was originally defined by Intel and has become a standard. Several manufacturers produce processors that implement the instruction set. Like all other PC standards, this standard is also evolving but newer standards are backwards compatible with past standards. The boot loader has to deal with some of this evolution because every PC processor starts simulating an Intel 8088, the CPU chip in the original IBM PC released in 1981. However, for most of xv6 you will be concerned with the modern x86 instruction set.
PC的处理器，实现X86指令集。这个指令集最早由因特尔提出并成为标准。多个厂商生产实现这个指令集的处理器。象所有其他的PC标准一样，这个标准随着时间推移也在改变，但新的标准均会向后兼容旧的标准。启动器不得不应对这些发展。因为每个PC处理器在开机时均模拟成因特尔的8088，这个CPU芯片是最早IBM PC在1981年发布的。然而，在xv6中，大部分情况是你仅需要关心现代x86指令集。
The modern x86 provides eight general purpose 32-bit registers—%eax, %ebx, %ecx, %edx, %edi, %esi, %ebp, and %esp—and a program counter %eip (the ‘ instruction pointer). The common e prefix stands for extended, as these are 32-bit extensions of the 16-bit registers %ax, %bx, %cx, %dx, %di, %si, %bp, %sp, and %ip. The two register sets are aliased so that, for example, %ax is the bottom half of %eax: writing to %ax changes the value stored in %eax and vice versa. The first four registers also have names for the bottom two 8-bit bytes: %al and %ah denote the low and high 8 bits of %ax; %bl, %bh, %cl, %ch, %dl, and %dh continue the pattern. In addition to these registers, the x86 has eight 80-bit floating-point registers as well as a handful of special-purpose registers like the control registers %cr0, %cr2, %cr3, and %cr4; the debug registers %dr0, %dr1, %dr2, and %dr3; the segment registers %cs, %ds, %es, %fs, %gs, and %ss; and the global and local descriptor table pseudo-registers %gdtr and %ldtr. The control registers and segment registers are important to any operating system. The floating-point and debug registers are less interesting and not used by xv6.
现代x86提供8个通用的32位寄存器——%eax、%ebx、%ecs、%edx、%edi、%esi、%ebp、%esp和一个程序计数器%eip(指令指针)。通常前缀e代表扩展，这些32位的寄存器是在16位的寄存器上扩展而来，%ax、%bx、%cd、%dx、%di、%si、%bp、%sp和%ip。这两套寄存器互为别名，如，%ax是%eax的低位部分：写到%ax中的值也被存储到%eax中，反之亦然。前四个寄存器的低字节部分的两个8位还有名字:%al、%ah，代表%ax的高和低8位；%bl、%bh、%cl、%ch、%dl和%dh也是同样模式。在这些寄存器之外，x86还有8个80位的浮点寄存器，作为少量的特殊目的寄存器，如控制寄存器%cr0、%cr2、%cr3和%cr4；调试寄存器%dr0、%dr1、%dr2和%dr3；段寄存器%cs、%ds、%es、%fs、%gs和%ss;全局和本地描述符表伪寄存器%gdtr和%ldtr。对于任何的操作系统来说控制寄存器和估m寄存器都是非常重要的。在xv6中不关心也没有用到浮点寄存器和调试寄存器。
Registers are fast but expensive. Most processors provide at most a few tens of general-purpose registers. The next conceptual level of storage is the main random-access memory (RAM). Main memory is 10-100x slower than a register, but it is much cheaper, so there can be more of it. One reason main memory is relatively slow is that it is physically separate from the processor chip. An x86 processor has a few dozen registers, but a typical PC today has gigabytes of main memory. Because of the enormous differences in both access speed and size between registers and main memory, most processors, including the x86, store copies of recently-accessed sections of main memory in on-chip cache memory. The cache memory serves as a middle ground between registers and memory both in access time and in size. Today’s x86 processors typically have two levels of cache, a small first-level cache with access times relatively close to the processor’s clock rate and a larger second-level cache with access times in between the first-level cache and main memory. This table shows actual numbers for an Intel Core 2 Duo system:
寄存器快但很贵。大部分处理器提供最多数十个左右的通用寄存器。下一个概念层次的存储器是主随机访问内存（RAM）。主内存要比寄存器慢10到100倍，但却便宜很多，因此数量上可以有很多。主存慢的一个原因是它与处理芯片相分离的。一个x86处理器可以有差不多12个左右的寄存器，但今天典型的PC却有成G的主存。在寄存器和主存的访问速度和大小上有巨大差异，大部分处理器，包括x86，存储最近访问的主存区域的一个拷贝到芯片上的缓存中。缓存的访问速度和大小均在内存和寄存器的一个中间水平。今天典型的x86处理器都有二级缓存，稍的一级缓存访问时间接近处理器的时钟周期，较大的二级缓存访问时间在一级缓存和主存之间。下面的表显示了一个因特尔Core 2 Duo的真实访问数据：
Intel Core 2 Duo E7200 at 2.53 GHz
TODO: Plug in non-made-up numbers!
|
Storage存储 |
access time访问时间 |
Size大小 |
|
Register |
0.6 ns |
64 bytes |
|
L1 cache |
0.5 ns |
64 kilobytes |
|
L2 cache |
10 ns |
4 megabytes |
|
main memory |
100 ns |
4 gigabytes |
For the most part, x86 processors hide the cache from the operating system, so we can think of the processor as having just two kinds of storage—registers and memory—and not worry about the distinctions between the different levels of the memory hierarchy.
大部分时候，x86处理器对操作系统隐藏了缓存，所以我们可以假定处理器仅有两种存储——寄存器和内存——不用担心不同存储层级之间的差异。
I/O
输入/输出
Processors must communicate with devices as well as memory. The x86 processor provides special in and out instructions that read and write values from device addresses called I/O ports. The hardware implementation of these instructions is essentially the same as reading and writing memory. Early x86 processors had an extra address line: 0 meant read/write from an I/O port and 1 meant read/write from main memory. Each hardware device monitors these lines for reads and writes to its assigned range of I/O ports. A device’s ports let the software configure the device, examine its status, and cause the device to take actions; for example, software can use I/O port reads and writes to cause the disk interface hardware to read and write sectors on the disk.
处理器必须与外设通信，比如内存。X86处理器提供特殊的in和out指令用来向被叫做I/O端口的设备地址读取和写入数值。这些指令的硬件实现和读写内存几无差别。早期的x86处理器有一个额外的地址线：0意味着从I/O商品读/写，1意味着从主存读/写。每个硬件设备监视这些线来读写到分配给它们的I/O端口。一个设备的端口允许软件配置设备、检测状态和向设备发送运作；例如软件可以使用I/O端口的读、写来控制磁盘接口硬件来读写磁盘扇区。
Many computer architectures have no separate device access instructions. Instead the devices have fixed memory addresses and the processor communicates with the device (at the operating system’s behest) by reading and writing values at those addresses. In fact, modern x86 architectures use this technique, called memory-mapped I/O, for most high-speed devices such as network, disk, and graphics controllers. For reasons of backwards compatibility, though, the old in and out instructions linger, as do legacy hardware devices that use them, such as the IDE disk controller, which xv6 uses.
很多计算机架构没有独立的设备访问指令。替代的是这些设备使用固定的内存地址，通过读写这些地址的值和处理器通信（在操作系统的命令下）。实际上，现代的x86架构使用这种技术，叫做内存映射I/O，对于大多数高速设备例如网络、磁盘和显示控制器。因后向兼容的原因，旧的in和out指令保留下来，对legacy硬件设备使用它们，比如xv6中使用的IDE磁盘控制器。