STM32 PWM 互补输出函数 调试通过

 #define PWM_CLK1M_ARR_8K 125-1

#define TIM_CLK1M  1000000

IzTrigPWMInit(TIM_CLK1M,PWM_CLK1M_ARR_8K);

void IzTrigPWMInit( uint32_t TIMCLK, uint16_t PWMCLK)//10%~90%
//void IzTDivPWMInit( uint32_t TIMCLK, uint16_t PWMCLK)//10%~90%
{
 if(TIMCLK>SystemCoreClock)
 {
  TIMCLK = SystemCoreClock;
 }

//reset 
  /* TIM3 enable counter */
  TIM_Cmd(TIM1, DISABLE);

   /* TIM3 Main Output Enable */
  TIM_CtrlPWMOutputs(TIM1, DISABLE); 
//end of reset
    /* System Clocks Configuration */
//  RCCPWMADCConfiguration();
 /* TIM1 clock enable */

   RCCPWMTDivConfiguration();

   GPIOPWMTDivConfiguration();

  /* -----------------------------------------------------------------------
    TIM3 Configuration: generate 4 PWM signals with 4 different duty cycles:
    The TIM3CLK frequency is set to SystemCoreClock (Hz), to get TIM3 counter
    clock at 24 MHz the Prescaler is computed as following:
     - Prescaler = (TIM3CLK / TIM3 counter clock) - 1
    SystemCoreClock is set to 72 MHz for Low-density, Medium-density, High-density
    and Connectivity line devices and to 24 MHz for Low-Density Value line and
    Medium-Density Value line devices

    The TIM3 is running at 36 KHz: TIM3 Frequency = TIM3 counter clock/(ARR + 1)
                                                  = 24 MHz / 666 = 36 KHz
    TIM3 Channel1 duty cycle = (TIM3_CCR1/ TIM3_ARR)* 100 = 50%
    TIM3 Channel2 duty cycle = (TIM3_CCR2/ TIM3_ARR)* 100 = 37.5%
    TIM3 Channel3 duty cycle = (TIM3_CCR3/ TIM3_ARR)* 100 = 25%
    TIM3 Channel4 duty cycle = (TIM3_CCR4/ TIM3_ARR)* 100 = 12.5%
  ----------------------------------------------------------------------- */
  /* Compute the prescaler value */
  //PrescalerValue = (uint16_t) (SystemCoreClock / 1000000) - 1;//24M
  //TIM3 Frequency=1MHz/(9999+1) =100Hz
  PrescalerValue = (uint16_t) (SystemCoreClock / TIMCLK) - 1; //TIM3 counter clock: 1MHz
  /* Time base configuration */
  //TIM_TimeBaseStructure.TIM_Period = 665;//(ARR)
  //TIM3 Frequency=1MHz/(9999+1) =100Hz
 // TIM_TimeBaseStructure.TIM_Period = 10000-1;  //TIM3 counter clock/TIM3 Frequency
  //TIM3 Frequency=1MHz/(99+1) =10 000Hz
  TIM_TimeBaseStructure.TIM_Period = PWMCLK;//PWM_CLK1M_ARR_100;  //TIM3 counter clock/TIM3 Frequency 
  TIM_TimeBaseStructure.TIM_Prescaler = PrescalerValue;
  TIM_TimeBaseStructure.TIM_ClockDivision = 0;
  TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
  TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;  //TIM1


  TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
  /* TIM1 Channel 1 Configuration in PWM mode */
//  /*
 
  TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2;
  TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
  TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
  TIM_OCInitStructure.TIM_Pulse = (uint16_t)(PWMCLK)*50/100;
  TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low;
  TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
  TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
  TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset;
 
//  */
#if 0
  /* PWM1 Mode configuration: Channel1 */
  TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
//  TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
//  TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Disable; 
  TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
  TIM_OCInitStructure.TIM_OutputNState = TIM_OutputState_Enable;   
/*
  if(PWMCLK==0)
  {
   TIM_OCInitStructure.TIM_Pulse = (uint16_t)(50/100);  
 }
  else
*/ 
  {
   TIM_OCInitStructure.TIM_Pulse = (uint16_t)(PWMCLK)*50/100;   
  }
  TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;

 // TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low;
  TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_Low;
  TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
  TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset;
#endif
/*
//PA8: TM1 Channel1 

  TIM_OC1Init(TIM1, &TIM_OCInitStructure);

  TIM_OC1PreloadConfig(TIM1, TIM_OCPreload_Enable); 
*/ 
 //PB14: TIM1_CH2N

  TIM_OC2Init(TIM1, &TIM_OCInitStructure);

  TIM_OC2PreloadConfig(TIM1, TIM_OCPreload_Enable); 
 
#if 0

 //PA9: TM1 Channel2

  /* PWM1 Mode configuration: Channel3 */
  TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
  TIM_OCInitStructure.TIM_Pulse = (uint16_t)(PWM_CLK1M_ARR_10K)*50/100;   


  TIM_OC2Init(TIM1, &TIM_OCInitStructure);

  TIM_OC2PreloadConfig(TIM1, TIM_OCPreload_Enable);


//PA10: TM1 Channel3
  /* PWM1 Mode configuration: Channel2 */
  TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
  TIM_OCInitStructure.TIM_Pulse =  (uint16_t)(PWM_CLK1M_ARR_10K)*50/100;

  TIM_OC3Init(TIM1, &TIM_OCInitStructure);

  TIM_OC3PreloadConfig(TIM1, TIM_OCPreload_Enable);

  /* PWM1 Mode configuration: Channel4 */
  TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
  TIM_OCInitStructure.TIM_Pulse = (uint16_t)(PWM_CLK1M_ARR_10K)*ch1duty/100; ;

  TIM_OC1Init(TIM3, &TIM_OCInitStructure);


  TIM_OC1PreloadConfig(TIM3, TIM_OCPreload_Enable);
#endif
  /* Automatic Output enable, Break, dead time and lock configuration*/
///*
  TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable;
  TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable;
  TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_1;
  TIM_BDTRInitStructure.TIM_DeadTime = 5;
  TIM_BDTRInitStructure.TIM_Break = TIM_Break_Disable;
  TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_High;
  TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;

  TIM_BDTRConfig(TIM1, &TIM_BDTRInitStructure);
 //*/
//  TIM_BDTRStructInit();

  TIM_ARRPreloadConfig(TIM1, ENABLE);

  /* TIM1 enable counter */
  TIM_Cmd(TIM1, ENABLE);

   /* TIM1 Main Output Enable */
  TIM_CtrlPWMOutputs(TIM1, ENABLE);

}

原文地址:https://www.cnblogs.com/glguan/p/2260519.html