C6678 PCIe boot default configuration value

length0x0030 (Hex)
checksum0x0000 (Hex)
boot_mode0x001E (Hex)
portNum0x0000 (Hex)
swPllCfg_msw0x4014 (Hex)
swPllCfg_lsw0x0102 (Hex)
options0x0000 (Hex)
addressWidth0x0020 (Hex)
linkRateMhz0x09C4 (Hex)
refClock10kHz0x2710 (Hex)
window0Size0x0020 (Hex)
window1Size0x0020 (Hex)
window2Size0x0020 (Hex)
window3Size0x0020 (Hex)
vendorId0x104C (Hex)
deviceId0xB005 (Hex)
classCodeRevId_Msw0x0480 (Hex)
classCodeRevId_Lsw0x0001 (Hex)
serdesCfgMsw0x0000 (Hex)
serdesCfgLsw0x01C9 (Hex)
serdesCfgLane0Msw0x0006 (Hex)
serdesCfgLane0Lsw0x2320 (Hex)
serdesCfgLane1Msw0x0002 (Hex)
serdesCfgLane1Lsw0x2320 (Hex)
原文地址:https://www.cnblogs.com/fpga/p/2775182.html